MIPS Addressing for 32-bit Immediate
and Addresses
Introduction to Addressing Modes
·
A strategy/method to identify where the operand is located.
·
Each addressing mode has a unique formula to locate the
operand.
They cannot replace each other to
locate the operand.
·
The operand in memory in all (but 2) addressing modes.
32-bit Constants
·
Most constants are small
·
16-bit immediate is sufficient
·
For the occasional 32-bit
constant
o lui rt, constant
·
Copies 16-bit constant to left 16 bits of rt
·
Clears right 16 bits of rt to 0
Branch Addressing
·
Branch instructions specify
o Opcode, two registers,
target address
·
Most branch targets are near branch
o
Forward or backward
PC-relative addressing
·
Target address = PC + offset × 4
·
PC already incremented by 4 by this time
Jump Addressing
·
Jump (j and jal) targets could be anywhere in text
segment
o Encode full address in
instruction
(Pseudo)Direct jump addressing
·
Target address = PC31…28 : (address × 4)
Target Addressing Example
·
Loop code from earlier example
o Assume Loop at location
80000
·
LOOP: mult $9, $19, $10 # R9 = R19*R10
lw $8, 1000($9) # R8 =@(R9+1000)
bne $8, $21, EXIT
add $19, $19, $20 #i = i + j j LOOP EXIT: ...
·
Assume LOOP is placed at location 80000
Branching Far Away
·
If branch target is too far to encode with 16-bit offset,
assembler rewrites the code
·
Example:
beq $s0,$s1, L1
↓
bne $s0,$s1, L2
j L1
L2: …
Addressing Modes in MIPS
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Addressing Mode Summary
MIPS Assembly and Machine Language
Parallelism & Instructions:
Synchronization
Definition of synchronization
Synchronization means the
process of making two or more data storage devices or programs (in the same or
different computers) having exactly the
same information at a given time.
Synchronization
i.
Two processors sharing an area of memory
·
P1 writes, then P2 reads
·
Data race if P1 and P2 don’t synchronize
o Result depends of order of
accesses
ii.
Hardware support required
·
Atomic read/write memory operation
·
No other access to the location allowed between the read and
write
iii.
Could be a single instruction
·
E.g., atomic swap of register ↔ memory
·
Or an atomic pair of instructions
Synchronization in MIPS
·
Load linked: ll rt, offset(rs)
·
Store conditional: sc rt, offset(rs)
·
Succeeds if location not changed since the ll
o Returns 1 in rt
·
Fails if location is changed
o Returns 0 in rt
·
Example: atomic swap (to test/set lock variable)
try: add $t0,$zero,$s4 ;copy exchange value
ll
$t1,0($s1) ;load linked
sc $t0,0($s1)
;store conditional
beq $t0,$zero,try ;branch store fails
add $s4,$zero,$t1 ;put load value
in $s4
Translating and Starting a program
Translation of hierarchy for C
·
4 phases to transform a C source code into a running program
in memory:
i.
Compiling
ii.
Assembling
iii.
Linking
iv.
Loading
Assembler Pseudoinstructions
·
Most assembler instructions represent machine instructions
one-to-one.
·
Pseudoinstructions: figments of the assembler’s imagination.
move $t0, $t1 → add $t0, $zero, $t1
blt
$t0, $t1, L → slt $at, $t0, $t1
bne $at, $zero, L
bne $at, $zero, L
o $at (register 1):
assembler temporary
Producing an Object Module
·
Assembler (or compiler) translates program into machine
instructions
·
Provides information for building a complete program from the
pieces
o Header: described contents
of object module
o Text segment: translated
instructions
o Static data segment: data
allocated for the life of the program
o Relocation info: for
contents that depend on absolute location of loaded program
o Symbol table: global
definitions and external refs
o Debug info: for
associating with source code
Assembling
·
Translate the assembly language into code(0,1)
·
Two steps to assemble:
i.
First step
·
Assign instruction addresses
·
Find symbols(Labels and Global variable names)
o Refer to symbol
table(determine addresses)
ii.
Second step
·
Assemble machine language code
·
Use the symbol table
Linking Object Modules
·
Produces an executable image
i. Merges
segments(data modules and code) symbolically in memory
ii. Resolve
the addresses of data and instruction labels
iii. Patch
internal and external references
·
Could leave location dependencies for fixing by a relocating
loader
o But with virtual memory,
no need to do this
o Program can be loaded into
absolute location in virtual memory space
Loading a Program
·
Load from image file on disk into memory in UNIX system:
i.
Reads the executable file header to determine segment sizes
ii.
Create an virtual address space for text (instructions) and
data
iii.
Copy text and initialized data into memory
o Or set page table entries
so they can be faulted in
iv.
Set up arguments on stack and copy the parameters(if any)
v.
Initialize machine registers and sets the stack pointer to
the first free location (including $sp, $fp, $gp)
vi.
Jump to startup routine
o Copies arguments to $a0 and
calls main
o When main returns,
terminates the program with exit system call
Dynamic Linking
·
Only link/load library procedure when it is called
o Requires procedure code to
be relocatable
o Avoids image bloat caused
by static linking of all (transitively) referenced libraries
o Automatically picks up new
library versions
Starting a Java program
·
Java was invented with a different sets of
goals.
(a) Steps for the first time a call is
made to DLL routine.
(b)
The steps to find the routine, remap it, and link it are skipped on subsequent
calls.
·
Java is compiled first to instructions sets that are easy to
interpret which is Java bytecode instruction sets .
·
Java bytecode is a instruction from an instruction set
designed to interpret Java program.
·
Java bytecode is executed by a software interpret called Java
Virtual Machine (JVM).
Translation of hierarchy of Java
References
http://users.manchester.edu/facstaff/rahmad/classes/308/slides/translating_executing.pdf
Written by,
Tan Sin Yee
B031210297
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5 bits
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5 bits
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16 bits
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